? semiconductor components industries, llc, 2010 october, 2010 ? rev. 4 1 publication order number: ntd20n03l27/d ntd20n03l27 power mosfet 20 amps, 30 volts, n ? channel dpak this logic level vertical power mosfet is a general purpose part that provides the ?best of design? available today in a low cost power package. avalanche energy issues make this part an ideal design in. the drain ? to ? source diode has a ideal fast but soft recovery. features ? ultra ? low r ds(on) , single base, advanced technology ? spice parameters available ? diode is characterized for use in bridge circuits ? i dss and v ds(on) specified at elevated temperatures ? high avalanche energy specified ? esd jedac rated hbm class 1, mm class a, cdm class 0 ? these devices are pb ? free and are rohs compliant typical applications ? power supplies ? inductive loads ? pwm motor controls ? replaces mtd20n03l in many applications maximum ratings (t c = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage v dss 30 vdc drain ? to ? gate voltage (r gs = 1.0 m ) v dgr 30 vdc gate ? to ? source voltage ? continuous ? non ? repetitive (t p 10 ms) v gs v gs 20 24 vdc drain current ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? single pulse (t p 10 s) i d i d i dm 20 16 60 adc apk total power dissipation @ t a = 25 c derate above 25 c total power dissipation @ t c = 25 c (note 1) p d 74 0.6 1.75 w w/ cw operating and storage temperature range t j , t stg ? 55 to 150 c single pulse drain ? to ? source avalanche energy ? starting t j = 25 c (v dd = 30 vdc, v gs = 5 vdc, l = 1.0 mh, i l(pk) = 24 a, v ds = 34 vdc) e as 288 mj thermal resistance ? junction ? to ? case ? junction ? to ? ambient ? junction ? to ? ambient (note 1) r jc r ja r ja 1.67 100 71.4 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. when surface mounted to an fr4 board using the minimum recommended pad size and repetitive rating; pulse width limited by maximum junction temperature. 20 a, 30 v, r ds(on) = 27 m n ? channel d s g 1 gate 3 source 2 drain 4 drain dpak case 369c style 2 20n3l = device code y = year ww = work week g = pb ? free package 1 2 3 4 dpak ? 3 case 369d style 2 1 2 3 4 marking diagrams yww 20 n3lg 1 gate 3 source 2 drain 4 drain yww 20 n3lg see detailed ordering and shipping information in the package dimensions sect ion on page 2 of this data sheet. ordering information http://onsemi.com
ntd20n03l27 http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain ? to ? source breakdown voltage (note 2) (v gs = 0 vdc, i d = 250 adc) temperature coefficient (positive) v (br)dss 30 ? ? 43 ? ? vdc mv/ c zero gate voltage drain current (v ds = 30 vdc, v gs = 0 vdc) (v ds = 30 vdc, v gs = 0 vdc, t j =150 c) i dss ? ? ? ? 10 100 adc gate ? body leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics (note 2) gate threshold voltage (note 2) (v ds = v gs , i d = 250 adc) threshold temperature coefficient (negative) v gs(th) 1.0 ? 1.6 5.0 2.0 ? vdc mv/ c static drain ? to ? source on ? resistance (note 2) (v gs = 4.0 vdc, i d = 10 adc) (v gs = 5.0 vdc, i d = 10 adc) r ds(on) ? ? 28 23 31 27 m static drain ? to ? source on ? voltage (note 2) (v gs = 5.0 vdc, i d = 20 adc) (v gs = 5.0 vdc, i d = 10 adc, t j = 150 c) v ds(on) ? ? 0.48 0.40 0.54 ? vdc forward transconductance (note 2) (v ds = 5.0 vdc, i d = 10 adc) g fs ? 21 ? mhos dynamic characteristics input capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz) c iss ? 1005 1260 pf output capacitance c oss ? 271 420 transfer capacitance c rss ? 87 112 switching characteristics (note 3) turn ? on delay time (v dd = 20 vdc, i d = 20 adc, v gs = 5.0 vdc, r g = 9.1 ) (note 2) t d(on) ? 17 25 ns rise time t r ? 137 160 turn ? off delay time t d(off) ? 38 45 fall time t f ? 31 40 gate charge (v ds = 48 vdc, i d = 15 adc, v gs = 10 vdc) (note 2) q t ? 13.8 18.9 nc q 1 ? 2.8 ? q 2 ? 6.6 ? source ? drain diode characteristics forward on ? voltage (i s = 20 adc, v gs = 0 vdc) (note 2) (i s = 20 adc, v gs = 0 vdc, t j = 125 c) v sd ? ? 1.0 0.9 1.15 ? vdc reverse recovery time (i s =15 adc, v gs = 0 vdc, dl s /dt = 100 a/ s) (note 2) t rr ? 23 ? ns t a ? 13 ? t b ? 10 ? reverse recovery stored charge q rr ? 0.017 ? c 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperature. ordering information device package shipping ? ntd20n03l27g dpak (pb ? free) 75 units/rail ntd20n03l27 ? 1g dpak ? 3 (pb ? free) 75 units/rail ntd20n03l27t4g dpak (pb ? free) 2500 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntd20n03l27 http://onsemi.com 3 1.6 1.4 1 1.2 0.8 0.6 10 1 100 1000 24 16 28 12 20 0 40 0.015 0 30 1 15 0.4 0.2 ? i d , drain current (amps) 0 ? v gs , gate ? to ? source voltage (v) figure 1. on ? region characteristics figure 2. transfer characteristics i d , drain current (amps) 2 0.04 0.035 0.03 0.025 22 15 12 0.02 0.015 0.01 0.005 0 5252832 figure 3. on ? resistance vs. drain current and temperature i d , drain current (amps) figure 4. on ? resistance vs. drain current and gate voltage i d , drain current (amps) figure 5. on ? resistance variation with temperature t j , junction temperature ( c) figure 6. drain ? to ? source leakage current vs. voltage ? v ds , drain ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance (normalized) ? i dss , leakage (na) 40 ? 50 75 50 0 ? 25 100 150 0.5 1.5 5 02832 24 20 36 16 40 0.02 0.01 0.025 0.03 01215 9 618 330 ? v ds , drain ? to ? source voltage (v) 5 10 20 25 35 1.4 2 4 0.6 0.8 1.2 1.6 1.8 1 2 2.5 3 3.5 4 4.5 818 3538 r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance ( ) 4812 125 25 21 24 27 v gs = 10 v v gs = 8 v v gs = 6 v v gs = 5 v v gs = 4.5 v v gs = 4 v v gs = 3.5 v v gs = 3 v v gs = 2.5 v 8 32 36 t j = 25 c t j = 100 c t j = ? 55 c v ds > = 10 v v gs = 5 v t j = 25 c t j = 100 c t j = ? 55 c v gs = 5 v v gs = 10 v t j = 25 c i d = 10 a v gs = 5 v t j = 100 c t j = 125 c v gs = 0 v t j = 25 c
ntd20n03l27 http://onsemi.com 4 4 350 300 200 250 150 100 0 8 4 10 2 6 0 12 14 10 1500 8 2 4 c, capacitance (pf) 0 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge v gs , gate ? to ? source voltage (v) 1 1000 100 10 10 1 100 figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) figure 10. diode forward voltage vs. current v sd , source ? to ? drain voltage (v) i s , source current (amps) t, time (ns) figure 11. maximum avalanche energy vs. starting junction temperature t j , starting junction temperature ( c) e as , single pulse drain ? to ? source avalanche energy (mj) 2500 25 125 100 75 50 150 06 14 0.0 0.4 0.5 0.3 0.2 0.6 0.1 1.0 10 16 8 12 0 18 20 gate ? to ? source or drain ? to ? source voltage (v) 500 1000 200 14 25 8 6 2 0 6 1012 16182023 2 4 8 10 12 6 4 2 0.7 0.8 0.9 50 v gs ? v ds c iss c oss c rss q 1 q 2 q i d = 20 a t j = 25 c v gs v ds = 20 v i d = 20 a v gs = 5.0 v t j = 25 c t r t f t d(off) t d(on) v gs = 0 v t j = 25 c i d = 24 a
ntd20n03l27 http://onsemi.com 5 package dimensions dpak (single gauge) case 369c ? 01 issue d style 2: pin 1. gate 2. drain 3. source 4. drain 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw
ntd20n03l27 http://onsemi.com 6 package dimensions dpak ? 3 case 369d ? 01 issue b style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ntd20n03l27/d/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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